Generation of Random Numbers using PUF and TRNG Techniques on FPGA

Authors

  • Namratha Naikar Assistant Professor, Department of Electronics and Communication Engineering, East West Institute of Technology, Bangalore, India
  • M. U. Hemashree Student, Department of Electronics and Communication Engineering, East West Institute of Technology, Bangalore, India
  • I. Javeria Khanum Student, Department of Electronics and Communication Engineering, East West Institute of Technology, Bangalore, India
  • H. D. Navaneetha Student, Department of Electronics and Communication Engineering, East West Institute of Technology, Bangalore, India

Keywords:

TRNG, PUF, MDMC, RO, Spartan-6

Abstract

The true random number generator plays a paramount role in cryptanalysis. It employs Ring oscillator (RO) & physical unclonable function (PUF) to generate random numbers. MDMC technique is used to correct soft errors present in the memory. The Verilog HDL is used as a programming language and Xilinx 14.7 ISE software is used for synthesis. Thus, power consumption and delay is reduced.

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Published

16-06-2022

Issue

Vol. 5 No. 6 (2022)

Section

Articles

License

Copyright (c) 2022 Namratha Naikar, M. U. Hemashree, I. Javeria Khanum, H. D. Navaneetha

Creative Commons License

This work is licensed under a Creative Commons Attribution 4.0 International License.

How to Cite

[1]
N. Naikar, M. U. Hemashree, I. J. Khanum, and H. D. Navaneetha, “Generation of Random Numbers using PUF and TRNG Techniques on FPGA”, IJRESM, vol. 5, no. 6, pp. 107–109, Jun. 2022, Accessed: Sep. 18, 2025. [Online]. Available: https://journal.ijresm.com/index.php/ijresm/article/view/2167